0 ASSIST-V: An Environment Simulator for IBM 360 Systems Software Development Charles E. Hughes Charles P. Pfleeger CS-77-23 September 1977 The work described here was supported by the National Science Foundation, under grant SER 76-14494. 1 1 0 ASSIST-V: An Environment Simulator 0 for IBM 360 Systems Software Development 0 Abstract 0 This paper describes ASSIST-V, a software tool designed for use in 0 the teaching of operating systems, file management and machine 0 architecture courses. ASSIST-V is a program that provides an 0 environment for the implementation, testing and evaluation of systems 0 software for the IBM 360 series machines. This capability is achieved 0 by simulating all relevant aspects of the machine's architecture. In 0 particular, ASSIST-V simulates interrupts, I/O channels, and I/O 0 devices, as well as all IBM 360 machine instructions. In addition, 0 ASSIST-V provides extensive debugging and statistics gathering aids. 1 2 0 1. Objectives 0 Although much can be learned through the reading of appropriate 0 textbooks, programming experience is still necessary to complete the 0 education of a systems programmer. For example, it is common practice 0 to include the programming of several of the components of a compiler in 0 a course on compiler construction. Unfortunately, a similar experience 0 is rarely afforded in operating systems courses. 0 There are several reasons why students seldom have the opportunity 0 to write and execute operating systems. First, this activity generally 0 requires dedicated use of a machine. Such dedication is usually not 0 feasible on a large, general purpose machine. However, many academic 0 departments do not have access to a minicomputer that has enough unused 0 time to satisfy the needs of operating systems students. Second, even 0 when it is possible to obtain exclusive use of a minicomputer, such use 0 is not always desirable. This undesirability arises from the lack of 0 debugging and statistics gathering aids, and from the restricted set of 0 I/O devices available on many minicomputer systems. 0 Clearly, students should have the opportunity to write a small 0 operating system. It is therefore important to develop student oriented 0 packages on which operating systems can be written. To be useful, any 0 such package must present the student with an environment that includes 0 all the relevant aspects of a computer's architecture. The 0 characteristics of the machine and its I/O devices should closely 0 resemble, or be the same as those of some widely available computer 0 system. I/O devices that must be controlled by the student's system 0 should include direct access as well as unit record equipment. The 0 package must be easy to use. It should provide debugging and 0 performance evaluation aids. Finally, and of primary importance, it 1 3 0 should be economical to use. 0 2. Related Work 0 IBM's VM/370 and CP/67 operating systems (see Goldberg, 1974) 0 provide each user of a S/370 and S/360-67, respectively, with an 0 environment that gives the appearance of a dedicated machine. In an 0 installation where VM/370 or CP/67 is the chosen operating syatem, it is 0 possible for students to write and test their own operating systems 0 without significantly degrading performance for other users of the 0 machine. However, VM/370 and CP/67 are not student-oriented. Although 0 this situation is "real-life", we feel it is too harsh for the beginning 0 student of operating systems. 0 A number of software aids have been developed to provide students 0 the opportunity to write and test operating system modules. These 0 simulators may be divided into three groups. 0 Programs in the first group, exemplified by Donovan (1976), and 0 Hughes and Walker (1974) simulate the environment for some one or more 0 operating system modules. A user writes the appropriate modules, links 0 these with the simulator, and executes the resultant program. For 0 example, an environment might be provided for a main memory allocation 0 routine. In this case, the user's routine would be given commands to 0 allocate and to deallocate varying amounts of memory. Experiments might 0 then be formulated to compare first fit to best fit allocation using two 0 separate user modules. Systems in this class have the advantages of 0 being easy to learn and of allowing the use of a high-level language, 0 usually PL/I or FORTRAN. Their main shortcoming is that they shield the 0 user from the problems resulting from the occurrence of asynchronous 0 events. In addition, users of these systems are not provided the 1 4 0 opportunity to work with I/O channels, nor to control the allocation of 0 space on direct access devices. 0 The second group of systems is exemplified by Czarnick (1973). 0 Here a parallel processing language is used to simulate a hypothetical 0 computer system. Hardware components of the computer, e.g., the program 0 counter and main memory, are represented by variables and arrays. 0 Students are given the assignment of writing operating system modules 0 that administer the allocation of these mock hardware resources. The 0 student modules are written in the parallel processing language and, 0 therefore, may be executed simultaneously. For this reason, the 0 variables and arrays representing hardware must be treated as critical 0 resources. Thus, the potential for synchronization problems arises in 0 the use of systems in this second group. However, there are still two 0 drawbacks to the use of such systems. First, the use of a hypothetical 0 computer gives many students the feeling that the work being carried out 0 is not applicable to real machines. Second, and more important, the 0 isolation of operating systems modules from user modules obviates the 0 need of the operating system to protect itself from users. This omits 0 an important consideration in the design of operating systems. 0 The third group of student oriented systems includes one that was 0 written at MIT (McCray, 1972, Madnick and Donovan, 1974 and 1977, and 0 Donovan, 1976), another developed at The University of Tennessee 0 (Stiles, 1973), and ASSIST-V, the simulator being described here. Each 0 of these simulates the IBM 360 machine instructions, interrupt 0 structure, and, in all but the Stiles system, a set of I/O channels and 0 devices. 0 The MIT simulator is written in PL/I and requires input of a single 0 object module. The use of PL/I as the simulator's implementation 1 5 0 language makes the code easy to read and maintain, but results in slow 0 execution times and a large memory requirement (about 170K bytes plus 0 user area). The input object module must be produced by some standard 0 language processor (usually Waterloo's Assembler G). Assembly or 0 compilation times for these standard (non-student oriented) processors 0 are often substantially greater than the times for student oriented 0 ones. Moreover, the error messages produced by standard processors are 0 significantly inferior to those generated by student systems. Since 0 cost-effectiveness and ease of use are among our primary objectives, we 0 view the above two features as drawbacks. In addition, the MIT system 0 has two deficiencies that we wished to overcome in our project. These 0 are the fact that it does not interpret all IBM 360 commands (omitted 0 instructions include ED, EDMK, TRT, and the decimal and floating point 0 commands) and the fact that it does not simulate direct access devices. 0 The Stiles simulator is written in S/360 assembler language and 0 requires input of a load module. As with the MIT system, the student's 0 operating system must be assembled (compiled) by some standard language 0 processor. Use of a load module, instead of an object module, provides 0 for additional flexibility since students can write parts of their 0 systems in one language and other parts in another language. Thus, for 0 example, the kernel of a system might be written in assembler language, 0 and all other parts in PASCAL or PL/I. The primary shortcomings of the 0 Stiles simulator are the fact that it does not interpret all IBM 360 0 commands (omitted are the translate and edit commands) and, more 0 importantly, it does not simulate I/O channels nor I/O devices. 0 ASSIST-V, the simulator described in this paper, is written in 0 S/360 assembler language and requires input of a S/360 assembler 0 language program that represents the student's operating system. 1 6 0 ASSIST-V is thus an assembler and a simulator. Its assembler (to be 0 discussed in more detail in the next section) is student oriented. As a 0 result, the student is never required to use a standard language 0 translator. All IBM 360 commands, including the privileged operations, 0 are interpreted by ASSIST-V. Direct-access devices (disks and drums), 0 in addition to unit-record devices (card readers and line printers), are 0 simulated. Extensive debugging and statistics gathering facilities are 0 provided. And finally, I/O pseudo commands are available so that input 0 and output can be performed without the need to know channel 0 programming, if such a simplification is desired. Channel level I/O is 0 of course available, and both channel level I/O and pseudo commands may 0 be used in the same program. (A use of this latter case might be the 0 printing of trace messages via pseudo commands in order to debug a set 0 of channel level programs.) 0 3. Implementation Environment 0 The ASSIST-V simulator was written as a major extension to an 0 existing program called ASSIST. ASSIST is a student oriented 0 assembler/interpreter for IBM 360-370 machines. It was designed and 0 implemented by Drs. John R. Mashey and Graham M. Campbell, both of The 0 Pennsylvania State University (Mashey, Campbell and Forney, 1972, 0 Mashey, 1973, and Overbeek and Singletary, 1976). The present version, 0 maintained by the authors and distributed by The Pennsylvania State 0 University (1), is in use at over 200 universities in the United States 0 and abroad. _________________________ 1 Additional information on obtaining ASSIST is available from Program Librarian, The Pennsylvania State Univ., 214 Computer Building, University Park, PA 16802. 1 7 0 ASSIST is small (full option version is about 68K bytes plus user 0 area), and fast (300 statements per second assembly, 7,300 statements 0 per second execution on an IBM 360 model 65). It assembles all IBM 360 0 instructions and interprets the execution of all non-privileged 0 instructions. It allows both user-written and system macros, as well as 0 conditional assembly statements in the open code. It includes a number 0 of student oriented features, such as pseudo operations to read a card, 0 print a line, and display the contents of registers or storage; 0 monitoring of time and output; an extensive dump at program termination; 0 technique for conserving paper; and a selective, user-controlled 0 cross-reference listing. 0 ASSIST-V is an extension to ASSIST. The assembler was preserved 0 virtually intact, and extensive additions were made to the interpreter. 0 Since the assembler was unchanged, no change to assembly speed has 0 occurred; execution speed is approximately 4300 instructions per second 0 on an IBM 360 model 65. The version of ASSIST-V described in this paper 0 requires 74K bytes of storage plus user area. 0 4. IBM 360 Architecture Overview 0 An operating system for the IBM 360 series machines establishes a 0 nucleus of information in certain fixed storage locations. These 0 locations are accessed by both hardware and software in order to handle 0 exceptional conditions. 0 An interruption is generated by hardware to note the occurrence of + ____________ 0 an event. There are five classes of interrupts; they are program + _______ 0 (irregularity sensed with current instruction), supervisor (execution of + __________ 0 supervisor call--SVC--instruction), external (timer expiration or + ________ 0 operator intervention demanded), I/O (exceptional condition in channel + ___ 1 8 0 program execution, e.g., channel program end), or machine check (machine + _______ _____ 0 malfunction sensed). For each of the five types of interrupts, there 0 are two storage locations reserved for program status words (PSW's). + _______ ______ _____ ___ _ 0 (The PSW specifies the address of the next instruction to be executed 0 and the status of the CPU during this execution.) In one of these, 0 called the old PSW for the interrupt, the current PSW is stored and a + ___ ___ 0 code is placed there to identify the source of the interrupt. The other 0 reserved storage location is called the new PSW for the interrupt; at + ___ ___ 0 the time of interrupt, the contents of this location are made the 0 current PSW. 0 I/O activities are initiated by execution of the start I/O (SIO) 0 privileged instruction. Upon execution of an SIO, the address of the 0 channel program is taken from a fixed memory location, called the 0 channel address word (CAW). At one or more times during execution of + _______ _______ ____ ___ 0 that program, the channel stores the status of the program's execution 0 in another fixed location called the channel status word (CSW). + _______ ______ ____ ___ 0 One word of storage (called the interval timer) is reserved for + ________ _____ 0 timing. The hardware automatically decrements the contents of this 0 location by 1 every 13.020833... microseconds (1/76800 seconds). 0 Whenever the contents of the interval timer goes from zero to negative, 0 an external interrupt occurs. 0 During the loading of an operating system into an IBM 360, one 0 storage location (at address 0) is reserved for the initial PSW. This 0 identifies the address at which execution of the operating system is to 0 begin and the initial status of the CPU. This location is called the 0 initial program load PSW (IPL PSW). + _______ _______ ____ ___ ___ ___ 1 9 0 5. Using ASSIST-V 0 5.1 An Overview 0 In order to use ASSIST-V, a person writes an operating system to be 0 tested. ASSIST-V assembles the program into an area of memory allocated 0 for the simulated machine. The first 128 bytes of the user's program 0 must contain data to initialize the fixed machine locations described in 0 Figure 1. The remainder of the user's program initializes the rest of 0 the simulated machine's memory; the memory size of the simulated machine 0 is the smallest multiple of 2K bytes greater than or equal to the size 0 of the user's program. Protection keys are allocated for each 2K block; 0 both store and fetch protection are simulated. 0 Address Length Purpose + _______ ______ _______ 0 doubleword initial program psw 8 2 doublewords unused (IPL CCW's) 24 doubleword external old PSW 32 doubleword supervisor call old PSW 40 doubleword program exception old PSW 48 doubleword unused (machine check old PSW) 56 doubleword input/output old PSW 64 doubleword channel status word 72 word channel address word 76 word unused 80 word interval timer 84 word unused 88 doubleword external new PSW 96 doubleword supervisor call new PSW 104 doubleword program exception new PSW 112 doubleword unused (machine check new PSW) 120 doubleword input/output new PSW Figure 1. ASSIST-V Fixed Memory Location Assignments 0 Execution of an operating system under ASSIST-V commences with the 0 IPL PSW being used to define the initial value of the current PSW. As 0 ASSIST-V sequences through instructions, it checks for any program 0 interruptions (e.g., address out of range, protection violation, illegal 0 opcode). If any of these occurs, ASSIST-V simulates a program interrupt 1 10 0 by storing the current PSW at the program old PSW (location 40) and 0 using the contents of the program new PSW (location 104) as the current 0 PSW. Similarly, the execution of an SVC results in the PSW being placed 0 at location 32, with the contents of location 96 becoming the current 0 PSW. 0 ASSIST-V presents a fault-free machine to the user, since hardware 0 error diagnosis is outside the usual scope of operating systems study. 0 For this reason the machine check old and new PSWs are unused. 0 An interval timer is maintained in bytes 80-83. At the completion 0 of execution of each instruction or I/O activity, the timer value is 0 decremented by an amount representing the time of that execution. For 0 the machine instructions, timings are used that approximate execution 0 speed of an IBM 360 model 65. (Different timings may be achieved by 0 modifying a single table within ASSIST-V.) For the I/O instructions, 0 times have been calculated for the reading of a card, printing of a 0 line, seeking of a direct access track, searching for a record on a 0 track, and reading or writing a record on a direct access device. A 0 timer (external) interrupt is generated each time the interval timer 0 goes from zero to negative. (Normally a user's operating system 0 initializes the initial interval timer to -1 so that timer interrupts do 0 not occur except as intended.) 0 In addition to program, SVC, and external interrupts, ASSIST-V 0 simulates I/O interrupts. These arise from the simulation of channel 0 program executions. Section 6 contains a detailed description of this 0 activity. 1 11 0 5.2 A First Example 0 Figure 2 presents a sample program and the output produced when 0 this program is executed by ASSIST-V. The program consists of an 0 initialization and user section, along with an SVC, timer and program 0 interrupt handler. 0 title 'figure 2. use of external, program and supervisor inte+ rrupts' space 1 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * program to illustrate use of assist-v for handling interrupts * * three different interrupts are caused: * * supervisor - from execution of supervisor call instruction * * external - from expiration of value in interval timer * * program - from protection exception * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * space 1 * the following constants initialize the fixed memory locations * as described in figure 1. figure2 start 0 using *,0 iplpsw dc x'00000000',a(initial) begin machine run at "initial" + super. mode, permit ext. ints. ds 2d unused (ipl ccws) extold ds d for external old psw svcold ds d for supervisor old psw pgmold ds d for program old psw ds d unused (machine check old psw) ds d unused (i/o old psw) ds 2d unused (csw, caw) timer ds f interval timer ds f unused extnew dc x'00000000',a(exthandl) external int. handler new psw svcnew dc x'00000000',a(svchandl) supervisor int. handler new psw pgmnew dc x'00000000',a(pgmhandl) program int. handler new psw ds d unused (machine check new psw) ds d unused (i/o new psw) space 2 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * initialization section * * set storage protection * * request tracing of psw swaps * * turn control to user program at label "user" * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * space 1 initial la 1,b'00110000' assign user prot. key b'00110' + (key 3, no fetch protect) la 2,user address of user 2k memory block ssk 1,2 set memory protection keys l 2,=xl4'00008000' trace all psw swaps sr 0,0 begin trace at location 0 1 12 la 1,user+2047 end trace at end of user area xopc 3 commence tracing lpsw userpsw transfer control to user space 1 userpsw dc 0d'0',X'01310000',a(user) allow external interrupts + prot. key=3, problem mode eject * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * supervisor call interrupt handler * * store value in reg. 1 in interval timer * * return control to user, after call * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * space 1 svchandl st 1,timer store user timer value (note: + prot key=0 in svc new psw) lpsw svcold return to point after svc with + user psw: prot key=3, prob. mode space 2 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * external interrupt handler * * break user's infinite loop and return to user at * * address "s0c4" * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * space 1 exthandl lpsw timpsw go back to user with new psw space 1 timpsw dc 0d'0',x'01310000',a(s0c4) same prot. key, mode; to + label "s0c4" space 2 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * program interrupt handler * * terminate program run, with dump * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * space 1 pgmhandl xopc 25 pseudo-op to terminate with dump ltorg , origin of literal pool space 2 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * user test program * * begin user program at second 2k memory block: address 2048 * * cause supervisor interrupt, after 5 has been placed in reg 1 * * execute statement labelled "loop" repeatedly until timer * * interrupt occurs * * cause s0c4 error (protection) from attempt to store in 2k * * block having different protection key * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * space 1 org figure2+x'800' position user at 2nd 2k block user la 1,5 put value 5 into reg. 1 svc 1 cause supervisor interrupt loop b * enter 1-instruction loop s0c4 st 1,timer try to store in different block end Figure 2: Interrupt Handler Example 1 13 0 The following describes the sequence of activities that takes place 0 when this program is executed by ASSIST-V. 0 1. The contents of location 0 (IPLPSW) are fetched and used as the 0 current PSW. This causes execution to start at the label INITIAL. 0 2. The initialization section sets the protection key of the second 2K 0 block of memory (the user's area) to 3, executes the pseudo 0 instruction XOPC 3 to turn on the trace facility for all 0 interrupts, and then uses a load PSW command to transfer control to 0 the user section (label USER). 0 3. The user section loads the value 5 into general purpose register 1. 0 It then executes an SVC 0, which causes the current PSW to be 0 stored at location 32 (SVCOLD) and the contents of location 96 0 (SVCNEW) to be used as the new value for the current PSW. This PSW 0 swap transfers control to the SVC interrupt handler (SVCHANDL). 0 4. The SVC interrupt handler stores the contents of register 1 into 0 the interval timer and then uses a load PSW from SVCOLD in order to 0 return control to the user (to the instruction after the user's 0 SVC, i.e., to label LOOP). 0 5. The user then enters a one instruction loop until the contents of 0 the interval timer become negative and a resultant external 0 interrupt occurs. The external interrupt causes the current PSW to 0 be stored at location 24 (EXTOLD) and the contents of location 88 0 (EXTNEW) to be used as the new value for the current PSW. As a 0 result, control is transferred to the external interrupt handler 0 (EXTHANDL). 0 6. The external interrupt handler performs a load PSW from TIMPSW 0 which returns to the user (to the instruction after the one active 1 14 0 when the timer interrupt occurred, i.e., to label S0C4). 0 7. At S0C4, the user attempts to store a value into the interval timer 0 (TIMER). This results in a protection error since the user's PSW 0 indicates a protection key of 3 and TIMER is located in a 2K block 0 with protection key of 0. (By default, all 2K blocks in an 0 ASSIST-V simulated machine are store and fetch protected with a key 0 of 0.) This protection violation results in a program interrupt 0 that causes the current PSW to be stored at location 40 (PGMOLD) 0 and the value at location 104 (PGMNEW) to be used as the new value 0 for the current PSW. This swap transfers control to the program 0 interrupt handler (PGMHANDL). 0 8. The program interrupt handler executes the pseudo instruction XOPC 0 25, which cause execution under ASSIST-V to terminate with a dump. 0 In reading the output of this program, you should note the 0 following. Each of the three PSW swaps is traced with a time stamp 0 affixed to note the time, in timer units, at which the interrupt 0 occurred. After program execution, summary statistics are produced. 0 Following these statistics, a trace is printed showing the last ten 0 instructions executed and the last ten control transfers executed. 0 Finally a post-mortem dump is given. 0 Omitted from the preceding example is any I/O activity (either 0 channel programs or I/O pseudo instructions). Channel programming is 0 the topic of the next section. Pseudo instructions are discussed in 0 section 7. 1 15 0 6. I/O Device Simulation 0 As noted before, one design constraint on ASSIST-V was that it 0 simulate a variety of I/O devices of both unit record and direct access 0 types. The current set of simulated devices is a card reader, a 0 printer, a movable head disk and a fixed head storage device. The 0 device handling is all table driven, so that a device can be added or 0 deleted with a change of only three source statements; similarly a 0 change in the characteristics of a device (e.g., size or speed) can be 0 done easily. 0 Students should appreciate the disparity in speeds between the CPU 0 and I/O devices. Students used to running in a spooled, multiprogrammed 0 environment tend to think of the reading of a card or the printing of a 0 line as instantaneous. Timings of operations on the simulated reader 0 and printer have been selected to match those of typical real devices. 0 It is also valuable for students to encounter the problems normally 0 encountered only when dealing with large amounts of data or long running 0 times. For example, one crucial problem in writing a file access system 0 is to select a placement of data on the physical device so as to 0 minimize the time required to move from one piece of data to a related 0 one. Because of the size of devices, a student working on a real system 0 is faced with this problem only when testing data sets of many items. 0 This is so because small sets can be recorded in such close proximity on 0 large devices that little or no physical movement is needed to access 0 different items. In ASSIST-V the sizes and transfer rates of simulated 0 devices have been reduced substantially from similar real devices, so 0 that the student encounters this needed head movement with a relatively 0 small amount of data. For example, the size of a track on the simulated 0 disk is 1692 bytes, compared 13,030 on a real IBM 3330 disk. 1 16 0 6.1 Device Characteristics 0 Channel 0 is a multiplexer channel that has two devices attached to 0 it--a card reader and a printer. The card reader processes cards at a 0 speed of 300 cards per minute or 1 card every 200 milliseconds. 0 The printer handles 132 byte print lines. The timings of real 0 printers, like the IBM 1403 printer, depend on several factors: the 0 number of single line spaces before or after printing, whether a 0 carriage skip is to be performed, and whether a line is to be printed or 0 only paper movement performed. Each of these factors is related to some 0 mechanical component of the printer. Timings of the simulated printer 0 in ASSIST-V are approximately proportional to those of a 1403. The time 0 for a write with single space after print is 205 millisecs, write with 0 no space after print is 165 msec, and an immediate skip to carriage tape 0 position one is 35 msec. 0 A track on a direct access device has an index point, followed by 0 R0, which is the first record on the track, followed by zero or more 0 user data records. The index point marks the beginning of the track; it 0 is used to begin processing at the start of a track or to determine when 0 one full revolution has occurred. R0 is a standard record, but it is 0 used in IBM programming systems as a capacity record, and it contains 0 the count of free and used space on the track. Special commands are 0 used to read and write R0. 0 User data records are of one of two formats: count-data and 0 count-key-data. Both forms begin with a count field that specifies the 0 location, length, and type of the record. Count-key-data records next 0 have a key field of at most 255 bytes; this field is used in searching 0 for a particular record. Both types of records end with a data field. 1 17 0 The two or three fields of any record are separated by gaps; successive 0 records are also separated by gaps. The gaps contain no meaningful 0 information; they allow time for a decision to be made while the 0 recording mechanism revolves to the next field or record. This decision 0 might be, for example, whether or not to read the data field of the 0 current record. The form of a direct access track is shown in Figure 3. 0 X gap |--------| gap |--------| gap |--------|...|--------| gap 000 X | C K Data C K Data C K Data C K Data pad | | R0 Record 1 Record 2 Record n | index index Figure 3. Track Format 0 Contents of each simulated direct access device are kept on real 0 auxiliary storage. In addition, the most recently accessed track is 0 also kept in main storage. Simulated head position is calculated based 0 on previous head position, amount of time since last I/O operation, and 0 rotational speed of the simulated device. This calculated time is used 0 to approximate the time for each SEEK and the rotational delay for each 0 READ, WRITE, or SEARCH command. Channel 1 controls one movable head 0 disk, having address 101. There are 20 cylinders, each consisting of 4 0 tracks. The total size of a track is 1692 bytes; however because of 0 gaps, the longest single data field that can be recorded is 1620 bytes. 0 As more records are recorded on a track, the space available for user 0 data decreases. 0 The total capacity of the simulated disk pack is 135,360 bytes, 0 including gaps. The mechanism rotates at a speed of 22 msec/rotation, 0 which yields a transfer rate of 76,805 characters per second. Seek or 0 access time (the time to move the head mechanism) is 2 msec per cylinder 0 crossed. Comparative sizes and speeds of similar real devices are shown 1 18 0 in Figure 4. 0 Device Size Speed + ______ ____ _____ (characters) (units per minute) IBM 2501 card reader 80 600-1000 simulated card reader 80 300 IBM 1403 printer 132 600-1100 simulated printer 132 approx. 300 (chars. per second) IBM 3330 disk 100,000,000 806,000 simluated disk 135,360 76,805 IBM 2301 drum 4,000,000 1,200,000 simulated drum 40,960 122,880 Figure 4. Capacities of Real and Simulated Devices 0 Channel two controls one fixed head storage device. This appears 0 like a device with one cylinder, having 20 tracks. Each track is 2048 0 bytes long, but for the reasons described above, that full space is not 0 available for data. The total capacity of the device is 40,960 bytes. 0 The mechanism rotates at a speed of 16-2/3 msec/rotation, which yields a 0 transfer rate of 122,880 characters per second. 0 6.2 Channel Commands 0 The user of ASSIST-V is presented with a defect-free machine. For 0 this reason, the only simulated channel commands are those used to 0 program devices free from hardware errors. (User errors are, however, 0 detected, and the appropriate notification is presented.) Other than 0 commands used to isolate device malfunction, a full set of commands have 0 been simulated. 0 The command accepted for the card reader is EBCDIC mode read with 0 stacker 1 selection. A variety of commands are valid on the printer. 0 Write with no space; write with one, two, or three spaces after write; 1 19 0 space one, two, or three lines without printing; and advance to a 0 carriage tape position are all accepted commands. 0 Commands for the direct access devices are in four categories. 0 Read commands and write commands, the first two categories, permit 0 processing of R0, a count field, a data field, key and data fields, or 0 count key and data fields. Search commands permit searching for the 0 beginning of the track, or for a particular record; the record being 0 searched for is identified either by record address (a part of the count 0 field) or by key value. Control commands consist of TIC, seeks, and set 0 file mask. TIC, transfer in channel, is a branch within a channel 0 program. Seeks are used to select a particular head on the access 0 mechanism (i.e., to prepare to process a particular track) or, for the 0 movable head disk, to position the access mechanism over a particular 0 track. The set file mask is used to inhibit certain types of writes in 0 a channel program. 0 6.3 An Example 0 Figure 5 below presents a sample program using the I/O facilities 0 of ASSIST-V. The program makes use of the XOPC instruction to perform 0 I/O channel program tracing; it also uses I/O pseudo-instructions XPRNT 0 (to print a line) and XDUMP (to dump an area of storage). 1 20 title 'figure 5. channel level i/o example' * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * this program demonstrates ASSIST-V channel level I/O * * three actions occur: * * 1. write three records on each of the 4 tracks of cylinder 0 * * 2. move to cylinder 1 and write three records on each of the * * 4 tracks of cylinder 1 * * 3. return to cylinder 0 and search for and read the last * * record on track 2. This last search occurs in multitrack * * mode. * this program uses sio with channel commands, i/o pseudo- * * instructions XPRNT and XDUMP, and tracing via pseudo- * * instruction XOPC. * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * figure5 start 0 using *,0 iplpsw dc x'ff040000',a(initial) begin simulation at "initial" ds 2d unused (ipl ccws) extold ds d external old psw svcold ds d supervisor old psw pgmold ds d program old psw machold ds d unused (machine check old psw) ioold ds d i/o old psw csw ds d channel status word caw ds x,al3 channel address word ds f unused timer dc f'-1' inhibit timer interrupts ds f unused extnew dc x'00060000',a(abend) should not occur svcnew dc x'00060000',a(abend) should not occur pgmnew dc x'00060000',a(abend) should not occur machnew ds d unused ionew dc x'00040000',a(ioint) i/o interrupt handler psw space 2 initial lm 0,1,=a(figure5,hicore) get address bounds for trace l 2,=x'00400000' trace all ccw's executed xopc 3 enable tracing b write1 transfer to initial write space 2 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * i/o interrupt handler * * take program out of wait state and * * transfer to next instruction * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * space 1 ioint ni ioold+1,b'11111101' turn off wait state bit in psw lpsw ioold resume execution where stopped ltorg , org figure5+x'800' place i/o program in 2nd 2k blk. eject * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * phases 1 2: preformat 4 tracks on cylinders 0 and 1 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * write1 mvc caw(4),=a(preform) show address of channel program lm 3,5,=f'0,1,1' limit on number of cylinders to + preformat 1 21 space 1 * * * * * * * * preformat 4 tracks of current cylinder * * * * * * * * loop1 lm 7,9,=f'0,1,3' limit on tracks per cylinder loop2 stc 7,ccwr1+17 place track number in record oi ccwr1+17,x'f0' convert to ebcdic form stc 7,ccwr2+17 place track number in record oi ccwr2+17,x'f0' convert to ebcdic form space 1 * * * * * * * * place cyl/track number in records to be written * * * lm 11,13,=a(ccwr0,20,ccwr2) limit on ccws to change loop3 stc 3,1(11) store cylinder number in count stc 7,3(11) store track number in count stc 7,14(11) store track number in key bxle 11,12,loop3 loop to change all ccws stc 3,seek+3 store cylinder number in seek stc 7,seek+5 store track number in seek sio x'101' initiate disk i/o lpsw wait1 go into wait state restart bxle 7,8,loop2 loop for all tracks of cyl. xopc 4 turn off trace xprnt =cl37'0formatting of one cylinder completed',37 bxle 3,4,loop1 loop for all cylinders space 2 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * phase 3: in multitrack mode, search for record 2 of cylinder 2 * * when found, read data portion of record and stop * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * mvc caw(4),=a(find) begin multitrack search program xopc 3 turn trace back on xprnt =cl20'0beginning of search',20 sio x'101' begin search program lpsw wait2 wait for i/o completion space 2 * * * * * * * * record found: dump it and halt * * * * * * * * * * * * dump xprnt =cl17'0search completed',17 xdump ans,4 display record found xopc 24 terminate normally abend xopc 25 terminate with dump eject ds 0d align ccws space 1 * * * * * * * * channel program 1: position head and write 3 records * preform dc x'1f',al3(sfmask),x'4000',h'1' set file mask dc x'07',al3(seek),x'4000',h'6' seek cyl/head home dc x'39',al3(seek+2),x'4000',h'4' search home addr. dc x'08',al3(home),x'4000',h'0' loop on search dc x'15',al3(ccwr0),x'6000',h'8' write r0 dc x'1d',al3(ccwr1),x'6000',h'20' write record 1 dc x'1d',al3(ccwr2),x'2000',h'20' write record 2 space 1 * * * * * * * * channel program 2: search for and read record * * * * * find dc x'1f',al3(sfmask),x'4000',h'1' set file mask dc x'07',al3(seek0),x'4000',h'6' seek cyl/head home1 dc x'39',al3(seek0+2),x'4000',h'4' search home addr. dc x'08',al3(home1),x'4000',h'0' loop on search srch22 dc x'e9',al3(key22),x'6000',h'8' search key high/equal 1 22 dc x'08',al3(srch22),x'4000',h'0' loop on search dc x'06',al3(ans),x'2000',h'4' read data space 1 wait1 dc x'ff060000',a(restart) wait on 1st i/o prog. wait2 dc x'ff060000',a(dump) wait on 2nd i/o prog. space 1 * * * * * * * * direct access records * * * * * * * * * * * * * * * * * * cyl,trk key len ------key value----- --data-- * * rec. no. data len value * ccwr0 dc h'0,0',al1(0,0),h'004',xl8'0000000000000000',xl4'0000' ccwr1 dc h'0,0',al1(1,8),h'160',xl8'0000000000000001',cl4'h r1' ccwr2 dc h'0,0',al1(2,8),h'160',xl8'0000000000000002',cl4'h r2' space 1 sfmask dc b'11000000' file mask: allow any seek, write seek dc xl6'000000000000' seek cyl 0, trk 0 seek0 dc xl6'000000000000' seek track 0, cyl 0 ans dc cl4' ' space for record sought key22 dc xl8'0000000000000202' search record 2, track 2 hicore equ * end Figure 5: Disk Example 0 The following actions occur in this example program. 0 1. The IPL PSW specifies an execution address of "INITIAL", which is 0 where execution begins. 0 2. The code at "INITIAL" sets addresses and turns on the trace 0 facility. 0 3. "WRITE1" is the address of a group of code that places the address 0 of the first channel program in the Channel Address Word (CAW). 0 This program will be executed eight times, to preformat the four 0 tracks of each of two cylinders. 0 4. The code at "LOOP1" places the track number in the data portion of 0 each record to be written, and the code at "LOOP3" places the 0 cylinder and head (track) number in the CCW's of the first channel 0 program. 0 5. The SIO instruction begins the channel program whose address is 0 presently in the CAW. This program does the following. 0 a. Set the file mask to allow all write and seek operations. 1 23 0 b. Seek (move the access arm) to the proper cylinder and activate 0 the proper recording head. 0 c. Search for the home address on the track, which verifies that 0 the head is positioned at the beginning of the track. This 0 search is repeated by means of the Transfer In Channel (TIC) 0 command. When the search succeeds, the CCW immediately after 0 the Search (the TIC) is skipped. 0 d. R0, the first record on the track, is written. 0 e. User data records R1 and R2 are written. Notice that the 0 count field of these records specifies length of 160, but the 0 length in the CCW is only 20 bytes (8 bytes count + 8 bytes 0 key + 4 bytes data). The remaining 116 data field bytes are 0 written as zeros. 0 f. At the end of the last write, the remainder of the track is 0 padded with zeros. 0 6. After the SIO is performed and the channel program is initiated, 0 the PSW labeled "WAIT1" is loaded, which places the CPU in wait 0 state (because bit 14 is a "1"). 0 7. After the channel program has executed, an I/O interruption occurs. 0 Since bit 1 (the mask for channel 1) is a "1," this interruption 0 causes storing/fetching of PSW's. "IOINT" receives control and 0 reloads the previous PSW, but with the wait bit off. 0 8. The same channel program is executed for all 8 tracks to be 0 written. After each cylinder is completed, a message is printed 0 and the trace facility is disabled. 0 9. After all tracks are formatted, the second channel program is 0 executed. First a message is printed and the trace facility is 0 reactivated. Activities in this channel program are these. 1 24 0 a. A file mask is set permitting all seeks and all writes. 0 b. The access mechanism is moved to cylinder 0, and head 0 is 0 activated. 0 c. The home address is sought to begin the search at the start of 0 the track. 0 d. A search occurs looking for a key on the track that is higher 0 than or equal to the specified key in main memory. Since this 0 is a multitrack search, each time the index point (end of 0 track) is sensed, the next higher numbered head is activated, 0 so that successive tracks are searched with the same command. 0 e. When this search succeeds, the first four bytes of the data 0 portion of that record are read into main memory, and the 0 channel program is completed. 0 10. After execution of the SIO and initiation of the channel program 0 begins, the CPU is again placed in wait state. 0 11. When the I/O interrupt occurs, execution recommences at label 0 "DUMP." There a message is printed, the main storage area in which 0 the record read from disk is dumped, and program execution 0 terminated normally with the XOPC instruction. 0 In the output from this program's execution, note that each CCW 0 traced is stamped with the simulated time at which it was executed. 0 Notice also that the final statistics note how much time the program was 0 active, as well as what percentage of that time the CPU and each of the 0 channels were active. The number of seeks and cylinders crossed are 0 also shown. 1 25 0 7. Program Aids 0 ASSIST-V retains all of the program aids provided by the 0 conventional ASSIST processor. At assembly time, these include an 0 optional program listing that may be compressed (two statements per 0 line) in order to conserve paper, an optional cross-reference facility 0 that distinguishes between store and fetch references, and intelligible 0 diagnostics that are printed immediately following the erroneous 0 statements. If a program being executed by ASSIST attempts to run for 0 an excessive amount of time, or produce excessive output (lines and/or 0 pages), an abnormal termination occurs. A trace of the last ten 0 instructions and the last ten branches executed is produced. The 0 contents of the current PSW, registers and storage are printed. 0 During program execution, a group of pseudo-operations are 0 interpreted by ASSIST. These include easy-to-use methods for 0 input/output, register and storage dumping, and a set of diagnostic 0 aids, such as checking for any modification to a given range of storage 0 locations, and tracing or counting the execution of instructions from 0 some specified range. 0 ASSIST-V extends ASSIST to provide debugging aids of importance to 0 writers of operating systems. Tracing of a program's execution has been 0 implemented with the following options. 0 Trace all instructions in a specified range of locations. Trace successful branches. Trace storage modifying instructions. Trace privileged operations. Trace execution while in supervisor mode only. Trace execution while in problem mode only. Trace interrupts of one or more given types. Trace interrupts while in supervisor mode only. Trace interrupts while in problem mode only. Trace all CCW commands on one or more given channels. Trace seek CCW commands on one or more given channels. 1 26 0 Furthermore, new instructions exist to provide the current (simulated) 0 system time, to simulate a console (external) interrupt after the 0 execution of some user-specified number of instructions, and to 0 terminate the simulation with or without a trace and dump. 0 In addition to time or output excession, and user requested 0 terminations, ASSIST-V abnormally terminates a program if the CPU is in 0 wait state with the interval timer negative and neither external nor I/O 0 activity is in progress. 0 8. Experience 0 ASSIST-V has been in use at The University of Tennessee since 0 September, 1976. During this time it has been used in machine 0 organization courses, operating systems courses, senior honors projects, 0 and master's theses. Projects completed have included operating systems 0 and several direct access file management systems. 0 In addition to its use at Tennessee, ASSIST-V has been utilized at 0 several other universities. Experience at these has demonstrated the 0 system's stability. As a result, it has been made available to the 0 current users of ASSIST. Those interested in acquiring a copy should 0 contact either of the authors for further information. 0 9. Acknowledgements 0 The authors wish to acknowledge the support provided for this 0 project by the National Science Foundation under NSF grant SER 76-14494. 0 We thank John Mashey of Bell Laboratories for having made our chore 0 easier by the excellent documentation and program structure of ASSIST. 0 Development of ASSIST-V was carried out using the IBM 360 model 65 0 at The University of Tennessee Computing Center. 1 27 0 Bibliography 0 Czarnick, B. et al. A Student Project for an Operating Systems Course. + _ _______ _______ ___ __ _________ _______ ______ 0 CSRG-29, Computer Systems Research Group: Univ. of Toronto, 1973. 0 Donovan, J. "Tools and Philosophy for Software Education," CACM 19, + ____ 0 (August, 1976) 430-436. 0 Goldberg, R. "Survey of Virtual Machine Research," Computer, 7(1974), + ________ 0 34-45. 0 Hughes, C. and Pfleeger, C. Assist-V Users' Guide. CS-77-24, Computer + ________ ______ _____ 0 Science Department: Univ. of Tennessee, 1977. 0 Hughes, C. and Walker, J. "POPSS, A System of Modeling and Analyzing 0 Operating System Resource Allocation Strategies", Proceedings of + ___________ __ 0 the Third Texas Conference on Computing Systems, 1974, 3.6.1-3.6.8. + ___ _____ _____ __________ __ _________ _______ 0 IBM. IBM System/360 Principles of Operation, form GA22-6821. + ___ __________ __________ __ _________ 0 IBM. Reference Manual for IBM 3830 Storage Control Model 1 and IBM 3330 + _________ ______ ___ ___ ____ _______ _______ _____ _ ___ ___ ____ 0 Disk Storage, form GA26-1592. + ____ _______ 0 Madnick, S. and Donovan, J. Operating Systems. New York: McGraw-Hill, + _________ _______ 0 1974. 0 Madnick, S. and Donovan, J. Software Projects. New York: McGraw-Hill, + ________ ________ 0 1977. 0 Mashey, J., Campbell, G. and Forney, C. "ASSIST-A Self-modifiable 0 Assembler for Instructional Purposes," Proceedings of the ACM, + ___________ __ ___ ___ 0 1972, 310-312. 0 Mashey, J. "Three Years' Experience with a Student Oriented Assembler," 0 SIGCSE Bulletin, 5(1973), 157-165. + ______ ________ 0 McCray, W. SIM360: A S/360 Simulator. Project Mac Technical Memorandum + _______ _ _____ _________ 0 30: Massachusetts Institute of Technology, 1972. 0 Overbeek, R. and Singletary, W. Assembler Language with ASSIST. Palo + _________ ________ ____ ______ 1 28 0 Alto: SRA, 1976. 0 Stiles, F.L. Personal communication. 0 Following are copies of the output produced by running the examples of 0 figures 2 and 5. 1*** ASSIST V2.1-5/1/78 INS=SDP/X=BGHO, CHECK=T(ALL)R(2-20/X2-20K), OPTS=D(1/6144)M(F)P(40-400/X15-400)VX PENN STATE * 0 FIGURE 2. USE OF EXTERNAL, PROGRAM AND SUPERVISOR INTERRUPTS PAGE 1 0 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT 3 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * 4 * PROGRAM TO ILLUSTRATE USE OF ASSIST-V FOR HANDLING INTERRUPTS * 5 * THREE DIFFERENT INTERRUPTS ARE CAUSED: * 6 * SUPERVISOR - FROM EXECUTION OF SUPERVISOR CALL INSTRUCTION * 7 * EXTERNAL - FROM EXPIRATION OF VALUE IN INTERVAL TIMER * 8 * PROGRAM - FROM PROTECTION EXCEPTION * 9 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * 11 * THE FOLLOWING CONSTANTS INITIALIZE THE FIXED MEMORY LOCATIONS 12 * AS DESCRIBED IN FIGURE 1. 000000 13 FIGURE2 START 0 000000 14 USING *,0 000000 0000000000000080 15 IPLPSW DC X'00000000',A(INITIAL) BEGIN MACHINE RUN AT "INITIAL" + SUPER. MODE, PERMIT EXT. INTS. 000008 16 DS 2D UNUSED (IPL CCWS) 000018 17 EXTOLD DS D FOR EXTERNAL OLD PSW 000020 18 SVCOLD DS D FOR SUPERVISOR OLD PSW 000028 19 PGMOLD DS D FOR PROGRAM OLD PSW 000030 20 DS D UNUSED (MACHINE CHECK OLD PSW) 000038 21 DS D UNUSED (I/O OLD PSW) 000040 22 DS 2D UNUSED (CSW, CAW) 000050 23 TIMER DS F INTERVAL TIMER 000054 24 DS F UNUSED 000058 00000000000000B0 25 EXTNEW DC X'00000000',A(EXTHANDL) EXTERNAL INT. HANDLER NEW PSW 000060 00000000000000A8 26 SVCNEW DC X'00000000',A(SVCHANDL) SUPERVISOR INT. HANDLER NEW PSW 000068 00000000000000C0 27 PGMNEW DC X'00000000',A(PGMHANDL) PROGRAM INT. HANDLER NEW PSW 000070 28 DS D UNUSED (MACHINE CHECK NEW PSW) 000078 29 DS D UNUSED (I/O NEW PSW) 31 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * 32 * INITIALIZATION SECTION * 33 * SET STORAGE PROTECTION * 34 * REQUEST TRACING OF PSW SWAPS * 35 * TURN CONTROL TO USER PROGRAM AT LABEL "USER" * 36 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * 000080 4110 0030 00030 38 INITIAL LA 1,B'00110000' ASSIGN USER PROT. KEY B'00110' + (KEY 3, NO FETCH PROTECT) 000084 4120 0800 00800 39 LA 2,USER ADDRESS OF USER 2K MEMORY BLOCK 000088 0812 40 SSK 1,2 SET MEMORY PROTECTION KEYS 00008A 5820 00C8 000C8 41 L 2,=XL4'00008000' TRACE ALL PSW SWAPS 00008E 1B00 42 SR 0,0 BEGIN TRACE AT LOCATION 0 000090 4110 0FFF 00FFF 43 LA 1,USER+2047 END TRACE AT END OF USER AREA 000094 0103 44 XOPC 3 COMMENCE TRACING 000096 8200 00A0 000A0 45 LPSW USERPSW TRANSFER CONTROL TO USER 0000A0 0131000000000800 47 USERPSW DC 0D'0',X'01310000',A(USER) ALLOW EXTERNAL INTERRUPTS + PROT. KEY=3, PROBLEM MODE 1 FIGURE 2. USE OF EXTERNAL, PROGRAM AND SUPERVISOR INTERRUPTS PAGE 2 0 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT 49 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * 50 * SUPERVISOR CALL INTERRUPT HANDLER * 51 * STORE VALUE IN REG. 1 IN INTERVAL TIMER * 52 * RETURN CONTROL TO USER, AFTER CALL * 53 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * 0000A8 5010 0050 00050 55 SVCHANDL ST 1,TIMER STORE USER TIMER VALUE (NOTE: + PROT KEY=0 IN SVC NEW PSW) 0000AC 8200 0020 00020 56 LPSW SVCOLD RETURN TO POINT AFTER SVC WITH + USER PSW: PROT KEY=3, PROB. MODE 58 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * 59 * EXTERNAL INTERRUPT HANDLER * 60 * BREAK USER'S INFINITE LOOP AND RETURN TO USER AT * 61 * ADDRESS "S0C4" * 62 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * 0000B0 8200 00B8 000B8 64 EXTHANDL LPSW TIMPSW GO BACK TO USER WITH NEW PSW 0000B8 013100000000080A 66 TIMPSW DC 0D'0',X'01310000',A(S0C4) SAME PROT. KEY, MODE; TO + LABEL "S0C4" 68 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * 69 * PROGRAM INTERRUPT HANDLER * 70 * TERMINATE PROGRAM RUN, WITH DUMP * 71 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * 0000C0 0119 73 PGMHANDL XOPC 25 PSEUDO-OP TO TERMINATE WITH DUMP 74 LTORG , ORIGIN OF LITERAL POOL 0000C8 00008000 75 =XL4'00008000' 77 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * 78 * USER TEST PROGRAM * 79 * BEGIN USER PROGRAM AT SECOND 2K MEMORY BLOCK: ADDRESS 2048 * 80 * CAUSE SUPERVISOR INTERRUPT, AFTER 5 HAS BEEN PLACED IN REG 1 * 81 * EXECUTE STATEMENT LABELLED "LOOP" REPEATEDLY UNTIL TIMER * 82 * INTERRUPT OCCURS * 83 * CAUSE S0C4 ERROR (PROTECTION) FROM ATTEMPT TO STORE IN 2K * 84 * BLOCK HAVING DIFFERENT PROTECTION KEY * 85 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * 000800 87 ORG FIGURE2+X'800' POSITION USER AT 2ND 2K BLOCK 000800 4110 0005 00005 88 USER LA 1,5 PUT VALUE 5 INTO REG. 1 000804 0A01 89 SVC 1 CAUSE SUPERVISOR INTERRUPT 000806 47F0 0806 00806 90 LOOP B * ENTER 1-INSTRUCTION LOOP 00080A 5010 0050 00050 91 S0C4 ST 1,TIMER TRY TO STORE IN DIFFERENT BLOCK 92 END 0*** NO STATEMENTS FLAGGED - NO WARNINGS, NO ERRORS *** DYNAMIC CORE AREA USED: 7276 LOW + 1032 HIGH, LEAVING 32652 FREE BYTES. AVERAGE: 89 BYTES/STMT *** 0*** CROSS-REFERENCE: VALUE(HEX) LOCATION REF REF ... (- SHOWS MODIFY) *** EXTHANDL 0000B0 25 INITIAL 000080 15 PGMHANDL 0000C0 27 SVCHANDL 0000A8 26 SVCOLD 000020 56 S0C4 00080A 66 TIMER 000050 -55 -91 TIMPSW 0000B8 64 USER 000800 39 43 47 USERPSW 0000A0 45 1*** ASSEMBLY TIME = 0.433 SECS, 214 STATEMENTS/SEC *** *** PROGRAM EXECUTION BEGINNING - ANY OUTPUT BEFORE EXECUTION TIME MESSAGE IS PRODUCED BY USER PROGRAM *** TRACE--> TIME: 00000000 PSW SWAP--CAUSE=SVC INT. :OPSW 01310001 40000806 ;NPSW 00000000 000000A8 TRACE--> TIME: 00000006 PSW SWAP--CAUSE=EXT INT. :OPSW 01310080 80000806 ;NPSW 00000000 000000B0 TRACE--> TIME: 00000006 PSW SWAP--CAUSE=PGM INT. :OPSW 01310004 8000080E ;NPSW 00000000 000000C0 0*** ASSIST-V FINAL STATISTICS *** SIMULATED CLOCK TIME= 6 TIMER UNITS CPU UTILIZATION: BUSY 100.0% SUPER 16.6% PROBLEM 83.3% CHANNEL UTILIZATION: CH0 0.0% CH1 0.0% CH2 0.0% PROCESSOR OVERLAP: CPU/CH0 0.0% CPU/CH1 0.0% CPU/CH2 0.0% DISK ARM MOVEMENT: DISK101 0 SEEKS, 0 CYLINDERS CROSSED 0*** EXECUTION TIME = 0.016 SECS. 75 INSTRUCTIONS EXECUTED - 4687 INSTRUCTIONS/SEC *** *** FIRST CARD NOT READ: NO CARDS READ:FILE UNOPENED 0*** ASSIST COMPLETION DUMP *** 0*** PSW AT ABEND 00000000 400000C2 COMPLETION CODE ASSIST = V01 USER REQUESTED ABEND DUMP 0*** TRACE OF INSTRUCTIONS JUST BEFORE TERMINATION: PSW BITS SHOWN ARE THOSE BEFORE CORRESPONDING INSTRUCTION DECODED *** 0 IM LOCATION INSTRUCTION : IM = PSW BITS 32-39 (ILC,CC,MASK) 0 80 000806 47F0 0806 0 80 000806 47F0 0806 0 80 000806 47F0 0806 0 80 000806 47F0 0806 0 80 000806 47F0 0806 0 80 000806 PSW SWAP -- EXT 0 00 0000B0 8200 00B8 0 00 00080A 5010 0050 0 80 00080E PSW SWAP -- PGM 0 00 0000C0 0119 <-- LAST INSTRUCTION DONE - PROBABLE CAUSE OF TERMINATION 0*** TRACE OF LAST 10 BRANCH INSTRUCTIONS EXECUTED *** 0 IM LOCATION INSTRUCTION : IM = PSW BITS 32-39 (ILC,CC,MASK) 80 000806 47F0 0806 80 000806 47F0 0806 80 000806 47F0 0806 80 000806 47F0 0806 80 000806 47F0 0806 80 000806 47F0 0806 80 000806 47F0 0806 80 000806 PSW SWAP -- EXT 00 0000B0 8200 00B8 80 00080E PSW SWAP -- PGM 0 REGS 0-7 00000000 00000005 00008000 F6F6F6F6 F6F6F6F6 F6F6F6F6 F6F6F6F6 F6F6F6F6 REGS 8-15 F6F6F6F6 F6F6F6F6 F6F6F6F6 F6F6F6F6 F6F6F6F6 F6F6F6F6 F6F6F6F6 F6F6F6F6 1*** USER STORAGE *** 0 CORE ADDRESSES SPECIFIED- 000000 TO 000FFF 000000 00000000 00000080 F7F7F7F7 F7F7F7F7 F7F7F7F7 F7F7F7F7 01310080 80000806 *........7777777777777777........* 000020 01310001 40000806 01310004 8000080E F7F7F7F7 F7F7F7F7 F7F7F7F7 F7F7F7F7 *.... ...........7777777777777777* 000040 F7F7F7F7 F7F7F7F7 F7F7F7F7 F7F7F7F7 FFFFFFFF F7F7F7F7 00000000 000000B0 *7777777777777777....7777........* 000060 00000000 000000A8 00000000 000000C0 F7F7F7F7 F7F7F7F7 F7F7F7F7 F7F7F7F7 *................7777777777777777* 000080 41100030 41200800 08125820 00C81B00 41100FFF 01038200 00A0F7F7 F7F7F7F7 *.............H............777777* 0000A0 01310000 00000800 50100050 82000020 820000B8 F7F7F7F7 01310000 0000080A *....................7777........* 0000C0 0119F7F7 F7F7F7F7 00008000 F7F7F7F7 F7F7F7F7 F7F7F7F7 F7F7F7F7 F7F7F7F7 *..777777....77777777777777777777* 0000E0 F7F7F7F7 F7F7F7F7 F7F7F7F7 F7F7F7F7 F7F7F7F7 F7F7F7F7 F7F7F7F7 F7F7F7F7 *77777777777777777777777777777777* LINES 000100-0007E0 SAME AS ABOVE 000800 41100005 0A0147F0 08065010 0050F7F7 F7F7F7F7 F7F7F7F7 F7F7F7F7 F7F7F7F7 *.......0......777777777777777777* 000820 F7F7F7F7 F7F7F7F7 F7F7F7F7 F7F7F7F7 F7F7F7F7 F7F7F7F7 F7F7F7F7 F7F7F7F7 *77777777777777777777777777777777* LINES 000840-000FE0 SAME AS ABOVE 0 *** TOTAL RUN TIME UNDER ASSIST = 0.483 SECS *** 1*** ASSIST V2.1-5/1/78 INS=SDP/X=BGHO, CHECK=T(ALL)R(2-20/X2-20K), OPTS=D(1/6144)M(F)P(40-400/X15-400)VX PENN STATE * 0 FIGURE 5. CHANNEL LEVEL I/O EXAMPLE PAGE 1 0 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT 2 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * 3 * THIS PROGRAM DEMONSTRATES ASSIST-V CHANNEL LEVEL I/O * 4 * THREE ACTIONS OCCUR: * 5 * 1. WRITE THREE RECORDS ON EACH OF THE 4 TRACKS OF CYLINDER 0 * 6 * 2. MOVE TO CYLINDER 1 AND WRITE THREE RECORDS ON EACH OF THE * 7 * 4 TRACKS OF CYLINDER 0 * 8 * 3. RETURN TO CYLINDER 1 AND SEARCH FOR AND READ THE LAST * 9 * RECORD ON TRACK 2. THIS LAST SEARCH OCCURS IN MULTITRACK * 10 * MODE. 11 * THIS PROGRAM USES SIO WITH CHANNEL COMMANDS, I/O PSEUDO- * 12 * INSTRUCTIONS XPRNT AND XDUMP, AND TRACING VIA PSEUDO- * 13 * INSTRUCTION XOPC. * 14 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * 000000 15 FIGURE5 START 0 000000 16 USING *,0 000000 FF04000000000080 17 IPLPSW DC X'FF040000',A(INITIAL) BEGIN SIMULATION AT "INITIAL" 000008 18 DS 2D UNUSED (IPL CCWS) 000018 19 EXTOLD DS D EXTERNAL OLD PSW 000020 20 SVCOLD DS D SUPERVISOR OLD PSW 000028 21 PGMOLD DS D PROGRAM OLD PSW 000030 22 MACHOLD DS D UNUSED (MACHINE CHECK OLD PSW) 000038 23 IOOLD DS D I/O OLD PSW 000040 24 CSW DS D CHANNEL STATUS WORD 000048 25 CAW DS X,AL3 CHANNEL ADDRESS WORD 00004C 26 DS F UNUSED 000050 FFFFFFFF 27 TIMER DC F'-1' INHIBIT TIMER INTERRUPTS 000054 28 DS F UNUSED 000058 0006000000000876 29 EXTNEW DC X'00060000',A(ABEND) SHOULD NOT OCCUR 000060 0006000000000876 30 SVCNEW DC X'00060000',A(ABEND) SHOULD NOT OCCUR 000068 0006000000000876 31 PGMNEW DC X'00060000',A(ABEND) SHOULD NOT OCCUR 000070 32 MACHNEW DS D UNUSED 000078 000400000000008E 33 IONEW DC X'00040000',A(IOINT) I/O INTERRUPT HANDLER PSW 000080 9801 0098 00098 35 INITIAL LM 0,1,=A(FIGURE5,HICORE) GET ADDRESS BOUNDS FOR TRACE 000084 5820 00A0 000A0 36 L 2,=X'00400000' TRACE ALL CCW'S EXECUTED 000088 0103 37 XOPC 3 ENABLE TRACING 00008A 47F0 0800 00800 38 B WRITE1 TRANSFER TO INITIAL WRITE 40 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * 41 * I/O INTERRUPT HANDLER * 42 * TAKE PROGRAM OUT OF WAIT STATE AND * 43 * TRANSFER TO NEXT INSTRUCTION * 44 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * 00008E 94FD 0039 00039 46 IOINT NI IOOLD+1,B'11111101' TURN OFF WAIT STATE BIT IN PSW 000092 8200 0038 00038 47 LPSW IOOLD RESUME EXECUTION WHERE STOPPED 48 LTORG , 000098 000000000000094D 49 =A(FIGURE5,HICORE) 0000A0 00400000 50 =X'00400000' 000800 51 ORG FIGURE5+X'800' PLACE I/O PROGRAM IN 2ND 2K BLK. 1 FIGURE 5. CHANNEL LEVEL I/O EXAMPLE PAGE 2 0 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT 53 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * 54 * PHASES 1 & 2: PREFORMAT 4 TRACKS ON CYLINDERS 0 AND 1 * 55 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * 000800 D203 0048 0950 00048 00950 56 WRITE1 MVC CAW(4),=A(PREFORM) SHOW ADDRESS OF CHANNEL PROGRAM 000806 9835 0954 00954 57 LM 3,5,=F'0,1,1' LIMIT ON NUMBER OF CYLINDERS TO + PREFORMAT 59 * * * * * * * * PREFORMAT 4 TRACKS OF CURRENT CYLINDER * * * * * * * * 00080A 9879 0960 00960 60 LOOP1 LM 7,9,=F'0,1,3' LIMIT ON TRACKS PER CYLINDER 00080E 4270 091D 0091D 61 LOOP2 STC 7,CCWR1+17 PLACE TRACK NUMBER IN RECORD 000812 96F0 091D 0091D 62 OI CCWR1+17,X'F0' CONVERT TO EBCDIC FORM 000816 4270 0931 00931 63 STC 7,CCWR2+17 PLACE TRACK NUMBER IN RECORD 00081A 96F0 0931 00931 64 OI CCWR2+17,X'F0' CONVERT TO EBCDIC FORM 66 * * * * * * * * PLACE CYL/TRACK NUMBER IN RECORDS TO BE WRITTEN * * * 00081E 98BD 096C 0096C 67 LM 11,13,=A(CCWR0,20,CCWR2) LIMIT ON CCWS TO CHANGE 000822 423B 0001 00001 68 LOOP3 STC 3,1(11) STORE CYLINDER NUMBER IN COUNT 000826 427B 0003 00003 69 STC 7,3(11) STORE TRACK NUMBER IN COUNT 00082A 427B 000E 0000E 70 STC 7,14(11) STORE TRACK NUMBER IN KEY 00082E 87BC 0822 00822 71 BXLE 11,12,LOOP3 LOOP TO CHANGE ALL CCWS 000832 4230 0938 00938 72 STC 3,SEEK+3 STORE CYLINDER NUMBER IN SEEK 000836 4270 093A 0093A 73 STC 7,SEEK+5 STORE TRACK NUMBER IN SEEK 00083A 9C00 0101 00101 74 SIO X'101' INITIATE DISK I/O 00083E 8200 08E8 008E8 75 LPSW WAIT1 GO INTO WAIT STATE 000842 8778 080E 0080E 76 RESTART BXLE 7,8,LOOP2 LOOP FOR ALL TRACKS OF CYL. 000846 0104 77 XOPC 4 TURN OFF TRACE 000848 E020 0990 0025 00990 78 XPRNT =CL37'0FORMATTING OF ONE CYLINDER COMPLETED',37 00084E 8734 080A 0080A 79 BXLE 3,4,LOOP1 LOOP FOR ALL CYLINDERS 81 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * 82 * PHASE 3: IN MULTITRACK MODE, SEARCH FOR RECORD 2 OF CYLINDER 2 * 83 * WHEN FOUND, READ DATA PORTION OF RECORD AND STOP * 84 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * 000852 D203 0048 0978 00048 00978 85 MVC CAW(4),=A(FIND) BEGIN MULTITRACK SEARCH PROGRAM 000858 0103 86 XOPC 3 TURN TRACE BACK ON 00085A E020 097C 0014 0097C 87 XPRNT =CL20'0BEGINNING OF SEARCH',20 000860 9C00 0101 00101 88 SIO X'101' BEGIN SEARCH PROGRAM 000864 8200 08F0 008F0 89 LPSW WAIT2 WAIT FOR I/O COMPLETION 91 * * * * * * * * RECORD FOUND: DUMP IT AND HALT * * * * * * * * * * * * 000868 E020 09B5 0011 009B5 92 DUMP XPRNT =CL17'0SEARCH COMPLETED',17 00086E E060 0941 0004 00941 93 XDUMP ANS,4 DISPLAY RECORD FOUND 000874 0118 94 XOPC 24 TERMINATE NORMALLY 000876 0119 95 ABEND XOPC 25 TERMINATE WITH DUMP 1 FIGURE 5. CHANNEL LEVEL I/O EXAMPLE PAGE 3 0 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT 000878 97 DS 0D ALIGN CCWS 99 * * * * * * * * CHANNEL PROGRAM 1: POSITION HEAD AND WRITE 3 RECORDS * 000878 1F00093440000001 100 PREFORM DC X'1F',AL3(SFMASK),X'4000',H'1' SET FILE MASK 000880 0700093540000006 101 DC X'07',AL3(SEEK),X'4000',H'6' SEEK CYL/HEAD 000888 3900093740000004 102 HOME DC X'39',AL3(SEEK+2),X'4000',H'4' SEARCH HOME ADDR. 000890 0800088840000000 103 DC X'08',AL3(HOME),X'4000',H'0' LOOP ON SEARCH 000898 150008F860000008 104 DC X'15',AL3(CCWR0),X'6000',H'8' WRITE R0 0008A0 1D00090C60000014 105 DC X'1D',AL3(CCWR1),X'6000',H'20' WRITE RECORD 1 0008A8 1D00092020000014 106 DC X'1D',AL3(CCWR2),X'2000',H'20' WRITE RECORD 2 108 * * * * * * * * CHANNEL PROGRAM 2: SEARCH FOR AND READ RECORD * * * * * 0008B0 1F00093440000001 109 FIND DC X'1F',AL3(SFMASK),X'4000',H'1' SET FILE MASK 0008B8 0700093B40000006 110 DC X'07',AL3(SEEK0),X'4000',H'6' SEEK CYL/HEAD 0008C0 3900093D40000004 111 HOME1 DC X'39',AL3(SEEK0+2),X'4000',H'4' SEARCH HOME ADDR. 0008C8 080008C040000000 112 DC X'08',AL3(HOME1),X'4000',H'0' LOOP ON SEARCH 0008D0 E900094560000008 113 SRCH22 DC X'E9',AL3(KEY22),X'6000',H'8' SEARCH KEY HIGH/EQUAL 0008D8 080008D040000000 114 DC X'08',AL3(SRCH22),X'4000',H'0' LOOP ON SEARCH 0008E0 0600094120000004 115 DC X'06',AL3(ANS),X'2000',H'4' READ DATA 0008E8 FF06000000000842 117 WAIT1 DC X'FF060000',A(RESTART) WAIT ON 1ST I/O PROG. 0008F0 FF06000000000868 118 WAIT2 DC X'FF060000',A(DUMP) WAIT ON 2ND I/O PROG. 120 * * * * * * * * DIRECT ACCESS RECORDS * * * * * * * * * * * * * * * * * 121 * CYL,TRK KEY LEN ------KEY VALUE----- --DATA-- * 122 * REC. NO. DATA LEN VALUE * 0008F8 0000000000000004 123 CCWR0 DC H'0,0',AL1(0,0),H'004',XL8'0000000000000000',XL4'0000' 00090C 00000000010800A0 124 CCWR1 DC H'0,0',AL1(1,8),H'160',XL8'0000000000000001',CL4'H R1' 000920 00000000020800A0 125 CCWR2 DC H'0,0',AL1(2,8),H'160',XL8'0000000000000002',CL4'H R2' 000934 C0 127 SFMASK DC B'11000000' FILE MASK: ALLOW ANY SEEK, WRITE 000935 000000000000 128 SEEK DC XL6'000000000000' SEEK CYL 0, TRK 0 00093B 000000000000 129 SEEK0 DC XL6'000000000000' SEEK TRACK 0, CYL 0 000941 40404040 130 ANS DC CL4' ' SPACE FOR RECORD SOUGHT 000945 0000000000000202 131 KEY22 DC XL8'0000000000000202' SEARCH RECORD 2, TRACK 2 00094D 132 HICORE EQU * 133 END 000950 00000878 134 =A(PREFORM) 000954 0000000000000001 135 =F'0,1,1' 000960 0000000000000001 136 =F'0,1,3' 00096C 000008F800000014 137 =A(CCWR0,20,CCWR2) 000978 000008B0 138 =A(FIND) 00097C F0C2C5C7C9D5D5C9 139 =CL20'0BEGINNING OF SEARCH' 000990 F0C6D6D9D4C1E3E3 140 =CL37'0FORMATTING OF ONE CYLINDER COMPLETED' 0009B5 F0E2C5C1D9C3C840 141 =CL17'0SEARCH COMPLETED' 0*** NO STATEMENTS FLAGGED - NO WARNINGS, NO ERRORS *** DYNAMIC CORE AREA USED: 10060 LOW + 2460 HIGH, LEAVING 28440 FREE BYTES. AVERAGE: 88 BYTES/STMT *** 0*** CROSS-REFERENCE: VALUE(HEX) LOCATION REF REF ... (- SHOWS MODIFY) *** ABEND 000876 29 30 31 ANS 000941 93 115 CAW 000048 -56 -85 CCWR0 0008F8 104 137 CCWR1 00090C -61 -62 105 CCWR2 000920 -63 -64 106 137 DUMP 000868 118 FIGURE5 000000 49 FIND 0008B0 138 HICORE 00094D 49 HOME 000888 103 HOME1 0008C0 112 INITIAL 000080 17 IOINT 00008E 33 IOOLD 000038 -46 47 KEY22 000945 113 LOOP1 00080A 79 LOOP2 00080E 76 LOOP3 000822 71 PREFORM 000878 134 RESTART 000842 117 SEEK 000935 -72 -73 101 102 SEEK0 00093B 110 111 SFMASK 000934 100 109 SRCH22 0008D0 114 WAIT1 0008E8 75 WAIT2 0008F0 89 WRITE1 000800 38 *** ASSEMBLY TIME = 0.466 SECS, 304 STATEMENTS/SEC *** 1*** PROGRAM EXECUTION BEGINNING - ANY OUTPUT BEFORE EXECUTION TIME MESSAGE IS PRODUCED BY USER PROGRAM *** TRACE--> TIME: 00000002; CCW ADDR: 000878; CCW: 1F 000934 4000 0001 TRACE--> TIME: 00000002; CCW ADDR: 000880; CCW: 07 000935 4000 0006 TRACE--> TIME: 00000008; CCW ADDR: 000888; CCW: 39 000937 4000 0004 TRACE--> TIME: 0000000C; CCW ADDR: 000898; CCW: 15 0008F8 6000 0008 TRACE--> TIME: 000006AC; CCW ADDR: 0008A0; CCW: 1D 00090C 6000 0014 TRACE--> TIME: 000006D2; CCW ADDR: 0008A8; CCW: 1D 000920 2000 0014 TRACE--> TIME: 00000798; CCW ADDR: 000878; CCW: 1F 000934 4000 0001 TRACE--> TIME: 00000798; CCW ADDR: 000880; CCW: 07 000935 4000 0006 TRACE--> TIME: 00000C92; CCW ADDR: 000888; CCW: 39 000937 4000 0004 TRACE--> TIME: 00000C96; CCW ADDR: 000898; CCW: 15 0008F8 6000 0008 TRACE--> TIME: 00001336; CCW ADDR: 0008A0; CCW: 1D 00090C 6000 0014 TRACE--> TIME: 0000135C; CCW ADDR: 0008A8; CCW: 1D 000920 2000 0014 TRACE--> TIME: 00001422; CCW ADDR: 000878; CCW: 1F 000934 4000 0001 TRACE--> TIME: 00001422; CCW ADDR: 000880; CCW: 07 000935 4000 0006 TRACE--> TIME: 0000191C; CCW ADDR: 000888; CCW: 39 000937 4000 0004 TRACE--> TIME: 00001920; CCW ADDR: 000898; CCW: 15 0008F8 6000 0008 TRACE--> TIME: 00001FC0; CCW ADDR: 0008A0; CCW: 1D 00090C 6000 0014 TRACE--> TIME: 00001FE6; CCW ADDR: 0008A8; CCW: 1D 000920 2000 0014 TRACE--> TIME: 000020AC; CCW ADDR: 000878; CCW: 1F 000934 4000 0001 TRACE--> TIME: 000020AC; CCW ADDR: 000880; CCW: 07 000935 4000 0006 TRACE--> TIME: 000025A6; CCW ADDR: 000888; CCW: 39 000937 4000 0004 TRACE--> TIME: 000025AA; CCW ADDR: 000898; CCW: 15 0008F8 6000 0008 TRACE--> TIME: 00002C4A; CCW ADDR: 0008A0; CCW: 1D 00090C 6000 0014 TRACE--> TIME: 00002C70; CCW ADDR: 0008A8; CCW: 1D 000920 2000 0014 0FORMATTING OF ONE CYLINDER COMPLETED 0FORMATTING OF ONE CYLINDER COMPLETED 0BEGINNING OF SEARCH TRACE--> TIME: 00005FF5; CCW ADDR: 0008B0; CCW: 1F 000934 4000 0001 TRACE--> TIME: 00005FF5; CCW ADDR: 0008B8; CCW: 07 00093B 4000 0006 TRACE--> TIME: 00006588; CCW ADDR: 0008C0; CCW: 39 00093D 4000 0004 TRACE--> TIME: 0000658C; CCW ADDR: 0008D0; CCW: E9 000945 6000 0008 TRACE--> TIME: 00006C2C; CCW ADDR: 0008D8; CCW: 08 0008D0 4000 0000 TRACE--> TIME: 00006C2C; CCW ADDR: 0008D0; CCW: E9 000945 6000 0008 TRACE--> TIME: 00006C34; CCW ADDR: 0008D8; CCW: 08 0008D0 4000 0000 TRACE--> TIME: 00006C34; CCW ADDR: 0008D0; CCW: E9 000945 6000 0008 TRACE--> TIME: 00006C3C; CCW ADDR: 0008D8; CCW: 08 0008D0 4000 0000 TRACE--> TIME: 00006C3C; CCW ADDR: 0008D0; CCW: E9 000945 6000 0008 TRACE--> TIME: 00006C44; CCW ADDR: 0008D8; CCW: 08 0008D0 4000 0000 TRACE--> TIME: 00006C44; CCW ADDR: 0008D0; CCW: E9 000945 6000 0008 TRACE--> TIME: 00006C4C; CCW ADDR: 0008D8; CCW: 08 0008D0 4000 0000 TRACE--> TIME: 00006C4C; CCW ADDR: 0008D0; CCW: E9 000945 6000 0008 TRACE--> TIME: 00006C54; CCW ADDR: 0008D8; CCW: 08 0008D0 4000 0000 TRACE--> TIME: 00006C54; CCW ADDR: 0008D0; CCW: E9 000945 6000 0008 TRACE--> TIME: 00006C5C; CCW ADDR: 0008D8; CCW: 08 0008D0 4000 0000 TRACE--> TIME: 00006C5C; CCW ADDR: 0008D0; CCW: E9 000945 6000 0008 TRACE--> TIME: 00006C64; CCW ADDR: 0008D8; CCW: 08 0008D0 4000 0000 TRACE--> TIME: 00006C64; CCW ADDR: 0008D0; CCW: E9 000945 6000 0008 TRACE--> TIME: 00006C6C; CCW ADDR: 0008E0; CCW: 06 000941 2000 0004 0SEARCH COMPLETED 0BEGIN XSNAP - CALL 1 AT C0000874 USER STORAGE 0 CORE ADDRESSES SPECIFIED- 000941 TO 000944 000940 00C8F2D9 F2000000 00000002 02F7F7F7 00000878 00000000 00000001 00000001 *.H2R2........777................* 1 0*** ASSIST-V FINAL STATISTICS *** SIMULATED CLOCK TIME= 27760 TIMER UNITS CPU UTILIZATION: BUSY 0.0% SUPER 0.0% PROBLEM 0.0% CHANNEL UTILIZATION: CH0 0.0% CH1 99.9% CH2 0.0% PROCESSOR OVERLAP: CPU/CH0 0.0% CPU/CH1 0.0% CPU/CH2 0.0% DISK ARM MOVEMENT: DISK101 9 SEEKS, 2 CYLINDERS CROSSED 0*** EXECUTION TIME = 0.383 SECS. 225 INSTRUCTIONS EXECUTED - 587 INSTRUCTIONS/SEC *** *** FIRST CARD NOT READ: NO CARDS READ:FILE UNOPENED *** AM004 - NORMAL USER TERMINATION BY RETURN *** *** TOTAL RUN TIME UNDER ASSIST = 0.883 SECS ***